Zoom V3 1612 Manual do Utilizador descarregar pdf (Página 32)

BIT1612 10-Bit Digital Video Decoder with OSD and T-CON

6.13 TCON Clock Mode

BIT1612 提供多種 TCON CPH Clock 模式，其相關 Registers 設定請參考下表。

Table 6-16 TCON Clock Mode Register

Mnemonic Address R/W Bits Description Default

R_CPH1E_CKSEL 0x033[1:0] RW 2 CPH1 Clock Type Selection on Swap Source = 0 01

R_CPH2E_CKSEL 0x033[3:2] RW 2 CPH2 Clock Type Selection on Swap Source = 0 01

R_CPH3E_CKSEL 0x033[5:4] RW 2 CPH3 Clock Type Selection on Swap Source = 0 01

R_CPH1O_CKSEL 0x034[1:0] RW 2 CPH1 Clock Type Selection on Swap Source = 1 01

R_CPH2O_CKSEL 0x034[3:2] RW 2 CPH2 Clock Type Selection on Swap Source = 1 01

R_CPH3O_CKSEL 0x034[5:4] RW 2 CPH3 Clock Type Selection on Swap Source = 1 01

R_CPH1_EN 0x035[0] RW 1 CPH1 Output Enable 1

R_CPH2_EN 0x035[1] RW 1 CPH2 Output Enable 1

CPH3 Output Enable

0: Disable

R_CPH3_EN 0x035[2] RW 1

1: Enable

TCON Clock Output Mode

0: Normal Mode

R_CPH_HALF 0x035[3] RW 1

1: Half Clock Mode

R_CPH1_POL 0x035[4] RW 1 CPH1 Polarity 0

R_CPH2_POL 0x035[5] RW 1 CPH2 Polarity 0

R_CPH3_POL 0x035[6] RW 1 CPH3 Polarity 0

6.14 Display Layer

BIT1612 提供五層 Display Layer 以疊層架構顯示在 Panel 上，高優先權的 Layer 可覆蓋在低優先權的 Layer

相關說明請參考下圖。例如：Layer 5 優先權高於 Layer 4。

Image Data

Background 2

Background 1

Internal OSD

External OSD

Panel

Output Windows

Layer 1

Layer 2

Layer 3

Layer 4

Layer 5

Figure 6-8 Display Layer

1 2 ... 27 28 29 30 31 32 33 34 35 36 37 ... 114 115

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